Director/Sr. Director SOC
Job Summary
Job Description
Seeking a seasoned Director/Sr. Director SOC to lead the design and development of high-performance data processing units. 15+ years of experience in micro-architecture, RTL design, and verification are required. Must have expertise in System Verilog, high-performance microcontroller/microprocessor architectures, and power management topologies.
Must have:
- Micro-architecture RTL
- System Verilog
- High-Performance Microcontroller
- Power Management
Good to have:
- RISC-V ARM
- Low Power
- ISO2626 FuSa
- 7nm Foundry
Perks:
- Unlimited Growth
- RISC-V Expertise
2 skills required
Job Details
Seeking experienced Director/Sr. Director SOC to lead the architecture, design and development of High-Performance Data Processing Unit Chiplets and High-Performance Automotive Microcontrollers. The Candidate will be responsible for all aspects of the design including Schedule, Architecture, Performance, Power, and Area.
Minimum Qualifications:
- Bachelors or Masters equivalent in Computer Science, Computer Engineering, Electrical Engineering or related fields.
- 15+ years of experience in Micro-architecture, RTL design or verification background.
- Knowledge of System Verilog and parametrized designs and configurable designs.
- Hands-on knowledge of high-performance microcontroller or Micro-processor architectures.
- In-depth knowledge of Power management topologies, cache-architectures, in-order/out-of order CPU architectures, multi-threading and high performance/high speed interfaces.
- Hands on knowledge of mixed signal analog architectures and high-performance SOC designs.
- Experience with major EDA tool vendor tools like Synopsys/Cadence/Tessent is desirable. Hands on knowledge of Synopsys Tools is preferable.
- In depth and hands on knowledge of bus architecture like AXI/AHB/equivalent protocols and various peripherals/CPU core integration.
- Excellent analytical and problem-solving skills, with great execution focus.
- Excellent leadership capabilities to build and lead a team of technical leads, engineers and contractors to accomplish the organization goals.
Preferred Qualifications:
- Experience with designing RISC-V, ARM and/or MIPS CPU
- Understanding of low power micro-architecture techniques
- Experience with ISO2626/FuSa
- Experience with 7nm or lower foundry process technology
Here’s what you can expect from us:
At MIPS, you’ll be a member of a fast-growing team of technologists that are creating the industry’s highest performance RISC-V processors. Small teams that are part of a non-compartmentalized structure – you’ll be able to understand and have an impact on the bigger picture. A great deal of autonomy, with support from some of the industry’s most experienced CPU engineers. An unlimited growth path – with the right skills, you can decide where you want to expand and grow in your role at MIPS. The opportunity to learn a great deal about the blossoming RISC-V architecture in cutting edge applications with industry leading customers.
At MIPS we provide meaningful benefits programs and products to our associates and their families. MIPS offers a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave!
More about us:
MIPS is well-known as a microprocessor pioneer, having led the way in RISC-based computing to enable faster and more power efficient semiconductors for a wide range of applications from consumer electronics to networking and communications. More than 30 years after the introduction of the original MIPS RISC architecture, MIPS processors have shipped into billions of consumer and enterprise products.
Today, MIPS is once again leading a RISC revolution as we build on our deep roots to accelerate the RISC-V architecture for high-performance applications. We are focused on delivering our first RISC-V products: the MIPS eVocore processors, which provide a new level of scalability for high-performance heterogeneous computing. Because of our RISC heritage, deep engineering expertise, and proven technologies, MIPS can accelerate development and deployment of RISC-V based solutions.
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