ASIC Verification EEJ 2024

Bosch Global Software Technologies Private Limited is a 100% owned subsidiary of Robert Bosch GmbH, one of the world's leading global supplier of technology and services, offering end-to-end Engineering, IT and Business Solutions. With over 22,700 associates, it’s the largest software development center of Bosch, outside Germany, indicating that it is the Technology Powerhouse of Bosch in India with a global footprint and presence in the US, Europe and the Asia Pacific region.

Tasks:Verificationof SoCs, automotive ASICs, subsystems, IPs.

Application of Metric-driven Verification (MDV) and/or Formal Verification methodologies

Developing and tracking of Verification plans

Develop verification environments from scratch

Create VIP

Integration of VIP („Verification-IP“)

Measure and analyze regression results

Continuous improvement of verification methods/tools/flows/processes together with EDA partners

Requirement:

5 to 10 years of Experience in Digital RTL verification using System Verilog and UVM.

Sound knowledge of constrained random verification, UVM/OVM

Sound knowledge in System Verilog.

Experience of developing functional coverage code, coverage analysis.

Experience of developing verification environments from scratch is desirable.

Good hands on experience with cadence/Synopsys/Mentor tools.

Exposure to configuration management, bug tracking tool etc.

Knowledge of scripting language, Perl TCL etc.

Good experience with AMBA protocols

Working knowledgeon ARM processor-based subsystem/SoC verification

Formal verification experience is a desirable but not must.

Must have been a part of one or more ASIC/SoC tape outs.

Knowledge of VHDL/VERILOG.

SPECMAN knowledge is a desirable but not must.

BE / B.Tech / ME / M.Tech (Electronics and Communication)

5-10 Years