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Staff/Senior Staff Engineer – CPU/Processor Verification – Cache Coherency

Karnataka, India (On-site)

Staff/Senior Staff Engineer – CPU/Processor Verification – Cache Coherency

2 Months ago • All levels • Research & Development

About the job

3 skills required for this role

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python

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Job Description

We are seeking a skilled CPU Verification Engineer with expertise in cache coherency verification. You will own verification environments and methodologies for microprocessor components. Strong experience with UVM, SystemVerilog, and Python scripting is essential.

Must have:

UVM expertise
Cache Coherency
SystemVerilog/UVM
Python scripting

Good to have:

CHI protocol
Multi-processor
Memory subsystems
Processor core design

Perks:

Autonomy & support
Unlimited growth path

We are looking for an experienced CPU Verification Engineer responsible for pre-silicon functional verification of our Coherency Manager, including CPU, Subsystem, and Memory Hierarchy. The role involves designing and verifying custom microprocessor-based systems using cutting-edge verification techniques. You will own verification environments and methodologies to simulate CPU/Cache Subsystem designs and perform verification at various levels within the hierarchy. A solid background in Electronics, Microelectronics, or Computer Science with strong programming skills is essential.

You will:

Own and drive verification environments for microprocessor components.
Implement best practices and innovative methodologies for robust verification processes.
Identify and resolve functional and performance issues before silicon production.

Ideally, you’ll have:

Expertise in functional verification of processors/caches, with proficiency in UVM.
Deep understanding of computer architecture, including processor core design, cache coherency, IO subsystem, and interrupt architecture.
Experience verifying multi-processor cache coherency, designs, protocols, and memory subsystems, with hands-on experience in CHI protocol.
Strong programming skills in SystemVerilog/UVM and Python scripting.

Here’s what you can expect from us:

At MIPS, you’ll be a member of a fast-growing team of technologists that are creating the industry’s highest performance RISC-V processors. Small teams that are part of a non-compartmentalized structure – you’ll be able to understand and have an impact on the bigger picture. A great deal of autonomy, with support from some of the industry’s most experienced CPU engineers. An unlimited growth path – with the right skills, you can decide where you want to expand and grow in your role at MIPS. The opportunity to learn a great deal about the blossoming RISC-V architecture in cutting edge applications with industry leading customers.

At MIPS we provide meaningful benefits programs and products to our associates and their families. MIPS offers a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave!

More about us:

MIPS is well-known as a microprocessor pioneer, having led the way in RISC-based computing to enable faster and more power efficient semiconductors for a wide range of applications from consumer electronics to networking and communications. More than 30 years after the introduction of the original MIPS RISC architecture, MIPS processors have shipped into billions of consumer and enterprise products.

Today, MIPS is once again leading a RISC revolution as we build on our deep roots to accelerate the RISC-V architecture for high-performance applications. We are focused on delivering our first RISC-V products: the MIPS eVocore processors, which provide a new level of scalability for high-performance heterogeneous computing. Because of our RISC heritage, deep engineering expertise, and proven technologies, MIPS can accelerate development and deployment of RISC-V based solutions.

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