About the job
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About the job
What You Will Be Doing
- Collaborate with technology leads, circuits and systems teams, VLSI physical design, and timing engineers to define and deploy the most sophisticated strategies of signing off timing in design for world-class silicon performance.
- Understand corner case timing sign-off risks in the latest 5nm and deeper technology nodes. Develop strategies to mitigate and margin for them.
- Develop tools and methodologies to improve design performance, predictability, and silicon reliability beyond what industry standard tools can offer.
- Extensively work with our ASIC Physical Design team to help develop methodologies, flows, and tools across a wide spectrum of domains - STA, constraints, floorplanning, timing and power optimization.
- Develop world class work flow solutions to aid analysis and improve flow efficiency.
- Master’s Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent work experience
- 3+ years of relevant work experience
- Deep understanding of backend design process, especially advanced STA.
- In depth understanding of PT and/or Tempus
- Expertise in coding -- TCL, Perl, Python. C++ is a plus!
- Strong communication and interpersonal skills
- Expertise in developing advanced STA flows
About The Company
Since its founding in 1993, NVIDIA (NASDAQ: NVDA) has been a pioneer in accelerated computing. The company’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined computer graphics, ignited the era of modern AI and is fueling the creation of the metaverse. NVIDIA is now a full-stack computing company with data-center-scale offerings that are reshaping industry.
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