Our mission is to create computing platforms (HW/SW co-design) that will transform the industry with the most advanced technologies. As fabric architect, you will be responsible for the internal interconnect architecture specification and its performance, power, area requirements. This will cover both coherent and non-coherent interconnects and chiplet-to-chiplet connections. You will be working with the Silicon team (eg. RTL/microarchitecture, DV, PD, Perf, DFT) members and industry consortiums such as UCIe.