Pre-SI System Level Verification is a huge challenge in complex CPU projects. This position enables to gain deep understanding of complex CPU Architecture/u-Architectures, protocols and HW-SW interactions to hunt system level corner case bugs. Work includes implementation of real life tests, SW workloads, drivers and end-to-end flow checkers on high-end fast emulation platforms simulating hundreds of millions of cycles to find the most complex CPU bugs.
Are you an experienced emulation verification engineer? Join us to verify and find bugs in the most complex CPU systems exists in the industry.
Are you an experienced verification engineer which had enough of block level verification? If you are seeking new horizons in the verification domain, system level verification is your next challenge!
Please note: It is not an easy role. Hard work is guaranteed. You’ll need to supply nothing but excellent verification quality, develop highly complex random tests and checkers to capture the trickiest system level bugs that can end up as client escapees. If that’s not enough, you’ll need to push the state of the art emulation platform to the edge in a very creative way to be able to complete your verification tasks.
Are you intrigued? If you are an experienced verification engineer seeking your next challenge, we will be more than happy to hear from you.
Position is open to both Haifa and Petach Tikva Intel sites.
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