Staff Soc Design Engineer, HBM

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To provide the best candidate experience with our high application volumes, we limit applications to a total of 10 over 6 months. 

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We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

The Advanced Controller Development (ACD) is part of Samsung’s Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash.  ACD’s vision is to solve key problems of Cloud & Data center by developing the new technology for storage (SSD) controller. We are an integral part of Samsung’s strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps.

We are looking for a dynamic, self-motivated Staff SoC design engineer, Ethernet.

Come join the team that is creating new computing system architectures needed to support emerging machine learning applications, data analytics and edge computing. You’ll focus on enhancement of storage (SSD) capability by developing the prototype controller and optimize it for mass production.

 Location: Hybrid, working onsite at our Folsom, CA offices 3 days a week, with the flexibility to work remotely the remainder of your time.

Job ID: 42297

• Demonstrated expertise in HBM memory subsystem design in the area of AI/ML.
• Responsible for integrating the third part IP (HBM Controller and PHY) for memory subsystem.
• Perform HBM DFT logic design and RTL implementation along with quality check (Assertion, Lint, CDC, and STA)
• Working closely with design verification team to meet functional coverage criteria.
• Working with physical designers on timing constraints, synthesis, DFT insertion, and static timing analysis.

What You Bring

• BE in Computer/Electrical Engineering or Computer Science with 10+ years; MS with 8+ years or Ph.D. with 5 + years of working experiences in storage industry, data center technologies, or cloud infrastructures.
• Experience in designing micro architecture of the HBM memory subsystem.
• Experience in writing micro architecture specification and RTL code.
• Experience in ASIC design flow.
• Experience in the commercial IPs such as HBM controller and PHY.
• Experience in high frequency clock distribution design, implementation, and analysis.
• Deep understanding of PPA (performance, power, and area) trade-offs.
• Proven record of the complex logic designs and timing closure on the large sophisticated designs.
• Strong scripting and automation skills using Tcl/Perl. Knowledge of Python is a plus.
• Self-motivated problem-solver with an ability to work well in a team.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

Preferred Skills

• Deep understanding of flash memory controller architecture, and related IP design, verification, SOC implementation process and tools.
• Working knowledge of storage technologies (NAND flash, SSD, etc.), especially for datacenter scale product (requirement, usage, etc.)
• Strong understanding of server memory and storage hierarchies, the existing and emerging technologies that could be utilized at each level, and the potential performance trade-offs and optimizations involved.
• Thorough knowledge of general computer architecture: computer/server systems, processors, storage, I/O, network, data centers, and typical applications.
• Understanding of the emerging technologies (CXL, Computation in memory and storage, Ethernet-attached SSD etc.) in server memory and storage systems
• Experience with evaluating the emerging challenges and opportunities in server memory and storage systems in 2015 and beyond.
• Experience with performance modeling of embedded systems is beneficial.
• Track record of innovation and creativity in problem solving
• Must be highly motivated with excellent verbal and written communication skills.
• Ability to meet aggressive project deadlines in a team environment
• Ability to work successfully with cross-functional teams, including coordinating across organizational boundaries and geographies.

#LI-SK1

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